RealView® Developer Kit Assembler Guide 4.2. Memory access instructions

4.2. Memory access instructions

This section contains the following subsections:

Address alignment
Alignment considerations that apply to all memory access instructions.
LDR and STR (zero, immediate, or pre-indexed immediate offset)
Load and store bytes, halfwords, words and doublewords.
LDR and STR (post-indexed immediate offset)
Load and store bytes, halfwords, words and doublewords.
LDR and STR (register or pre-indexed register offset)
Load and store bytes, halfwords, words and doublewords.
LDR and STR (post-indexed register offset)
Load and store bytes, halfwords, words and doublewords.
LDR (PC-relative)
Load bytes, halfwords, words and doublewords.
LDM and STM
Load and Store Multiple Registers.
PUSH and POP
Push low registers, and optionally the LR, onto the stack.
Pop low registers, and optionally the PC, off the stack.
SWP and SWPB
Swap data between registers and memory.

Note

There is also an LDR pseudo-instruction (see LDR pseudo-instruction). This pseudo-instruction either assembles to an LDR instruction, or to a MOV or MVN instruction.

Compilation tools are restricted to the permitted endianness of the target microcontroller unit (MCU).

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