RealView® Developer Kit Assembler Guide 4.7.1. SBFX and UBFX

4.7.1. SBFX and UBFX

Signed and Unsigned Bit Field extract. Copies adjacent bits from one register into the least significant bits of a second register, and sign extends or zero extends to 32 bits.

Syntax

op{cond} Rd, Rm, #lsb, #width

where:

op: is either SBFX or UBFX.
cond: is an optional condition code (see Conditional execution).
Rd: is the destination register.
Rm: is the source register.
lsb: is the bit number of least significant bit in the bitfield, in the range 0 to 31.
width: is the width of the bitfield, in the range 1 to (1+lsb).

Do not use r15 for Rd or Rn

Condition flags

These instructions do not alter any flags.

Architectures

These ARM instructions are available in ARMv6T2 and above.

These 32-bit Thumb-2 instructions are available in T2 variants of ARMv6 and above.

There are no 16-bit Thumb versions of these instructions.

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