2.4.1. Configuring OVL

See Tools for the versions of OVL assertions that the OVL version of the protocol checker supports, and how to configure the protocol checker for backward compatibility.

To enable the OVL assertions, you must define ASSERT_ON. ARM also recommends that you set additional simulation variables. The following are the OVL macros with example values:

+define+OVL_ASSERT_ON                         // Enable OVL assertions
+define+OVL_MAX_REPORT_ERROR=1                // Message limit per OVL instance
+define+OVL_END_OF_SIMULATION=tb_AxiPC_simulation.simulation_done
+define+OVL_INIT_MSG                          // Report initialization messages
+define+OVL_INIT_COUNT=tb_AxiPC_simulation.ovl_init_count

Note

Defining OVL_MAX_REPORT_ERROR to 1 or perhaps 2 avoids getting multiple occurrences of the same error because this can hinder you during debugging.

Note

For AxiPC, you MUST define ASSERT_ON and OVL_ASSERT_ON. The other macros are optional but can affect the results, for example, if you do not define OVL_END_OF_SIMULATION, the end-of-simulation checks are not performed.

The OVL version of the protocol checker is tested with a number of simulators. Contact your simulator supplier and see your documentation for more guidance on using Verilog OVL assertions.

Note

There is a known timing problem with some simulators that issue some false fails. To avoid these timing issues, you can check the assertions on the opposite edge of the clock by defining the following:

+define+AXI_OVL_CLK=~ACLK

See the simulator documentation for more information.

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