Core Tile for ARM1156T2F-S User Guide: 5.1.2. HDRY signals

5.1.2. HDRY signals

Table 5.3 describes the signals on the HDRY pins for the CT1156T2F-S and the baseboard. None of the HDRY pins are utilized by the CT1156T2F-S. The generic HDRY Y bus signals are listed in Table 5.3 for reference only.

Note

Corresponding pins on the upper and lower headers feed the generic signals through the tile stack.

The signal on the upper header is named YUn and the signal on the lower header is named YLn, the table entry is Yxn. Replace x by L for the signal on the lower header and by U for the signal on the upper header. For example, the pin 1 signal for the lower header is YL89 and the pin 1 signal for the upper header is YU89.

For the EB there are two HDRY headers (tile site 1 and tile site 2). Replace the TnY signal prefix in the table by T1Y or T2Y to get the signal name for tile site 1 or 2 respectively.

Table 5.3. HDRY signals

Core Tile signals	Baseboard signals	Even pins	Odd pins	Baseboard signals	Core Tile signals
Yx90	TnY90	2	1	TnY89	Yx89
Yx91	TnY91	4	3	TnY88	Yx88
Yx92	TnY92	6	5	TnY87	Yx87
Yx93	TnY93	8	7	TnY86	Yx86
Yx94	TnY94	10	9	TnY85	Yx85
Yx95	TnY95	12	11	TnY84	Yx84
Yx96	TnY96	14	13	TnY83	Yx83
Yx97	TnY97	16	15	TnY82	Yx82
Yx98	TnY98	18	17	TnY81	Yx81
Yx99	TnY99	20	19	TnY80	Yx80
Yx100	TnY100	22	21	TnY79	Yx79
Yx101	TnY101	24	23	TnY78	Yx78
Yx102	TnY102	26	25	TnY77	Yx77
Yx103	TnY103	28	27	TnY76	Yx76
Yx104	TnY104	30	29	TnY75	Yx75
Yx105	TnY105	32	31	TnY74	Yx74
Yx106	TnY106	34	33	TnY73	Yx73
Yx107	TnY107	36	35	TnY72	Yx72
Yx108	TnY108	38	37	TnY71	Yx71
Yx109	TnY109	40	39	TnY70	Yx70
Yx110	TnY110	42	41	TnY69	Yx69
Yx111	TnY111	44	43	TnY68	Yx68
Yx112	TnY112	46	45	TnY67	Yx67
Yx113	TnY113	48	47	TnY66	Yx66
Yx114	TnY114	50	49	TnY65	Yx65
Yx115	TnY115	52	51	TnY64	Yx64
Yx116	TnY116	54	53	TnY63	Yx63
Yx117	TnY117	56	55	TnY62	Yx62
Yx118	TnY118	58	57	TnY61	Yx61
Yx119	TnY119	60	59	TnY60	Yx60
Yx120	TnY120	62	61	TnY59	Yx59
Yx121	TnY121	64	63	TnY58	Yx58
Yx122	TnY122	66	65	TnY57	Yx57
Yx123	TnY123	68	67	TnY56	Yx56
Yx124	TnY124	70	69	TnY55	Yx55
Yx125	TnY125	72	71	TnY54	Yx54
Yx126	TnY126	74	73	TnY53	Yx53
Yx127	TnY127	76	75	TnY52	Yx52
Yx128	TnY128	78	77	TnY51	Yx51
Yx129	TnY129	80	79	TnY50	Yx50
Yx130	TnY130	82	81	TnY49	Yx49
Yx131	TnY131	84	83	TnY48	Yx48
Yx132	TnY132	86	85	TnY47	Yx47
Yx133	TnY133	88	87	TnY46	Yx46
Yx134	TnY134	90	89	TnY45	Yx45
Yx135	TnY135	92	91	TnY44	Yx44
Yx136	TnY136	94	93	TnY43	Yx43
Yx137	TnY137	96	95	TnY42	Yx42
Yx138	TnY138	98	97	TnY41	Yx41
Yx139	TnY139	100	99	TnY40	Yx40
Yx140	TnY140	102	101	TnY39	Yx39
Yx141	TnY141	104	103	TnY38	Yx38
Yx142	TnY142	106	105	TnY37	Yx37
Yx143	TnY143	108	107	TnY36	Yx36
Yx144	TnY144	110	109	TnY35	Yx35
Yx145	TnY145	112	111	TnY34	Yx34
Yx146	TnY146	114	113	TnY33	Yx33
Yx147	TnY147	116	115	TnY32	Yx32
Yx148	TnY148	118	117	TnY31	Yx31
Yx149	TnY149	120	119	TnY30	Yx30
Yx150	TnY150	122	121	TnY29	Yx29
Yx151	TnY151	124	123	TnY28	Yx28
Yx152	TnY152	126	125	TnY27	Yx27
Yx153	TnY153	128	127	TnY26	Yx26
Yx154	TnY154	130	129	TnY25	Yx25
Yx155	TnY155	132	131	TnY24	Yx24
Yx156	TnY156	134	133	TnY23	Yx23
Yx157	TnY157	136	135	TnY22	Yx22
Yx158	TnY158	138	137	TnY21	Yx21
Yx159	TnY159	140	139	TnY20	Yx20
Yx160	TnY160	142	141	TnY19	Yx19
Yx161	TnY161	144	143	TnY18	Yx18
Yx162	TnY162	146	145	TnY17	Yx17
Yx163	TnY163	148	147	TnY16	Yx16
Yx164	TnY164	150	149	TnY15	Yx15
Yx165	TnY165	152	151	TnY14	Yx14
Yx166	TnY166	154	153	TnY13	Yx13
Yx167	TnY167	156	155	TnY12	Yx12
Yx168	TnY168	158	157	TnY11	Yx11
Yx169	TnY169	160	159	TnY10	Yx10
Yx170	TnY170	162	161	TnY9	Yx9
Yx171	TnY171	164	163	TnY8	Yx8
Yx172	TnY172	166	165	TnY7	Yx7
Yx173	TnY173	168	167	TnY6	Yx6
Yx174	TnY174	170	169	TnY5	Yx5
Yx175	TnY175	172	171	TnY4	Yx4
Yx176	TnY176	174	173	TnY3	Yx3
Yx177	TnY177	176	175	TnY2	Yx2
Yx178	TnY178	178	177	TnY1	Yx1
Yx179	TnY179	180	179	TnY0	Yx0

For a description of the AXI bus signals see AMBA AXI Protocol Specification (ARM IHI 0022), Chapter 2 Signal Descriptions.

Copyright © 2006-2011 ARM Limited. All rights reserved.	ARM DUI 0331C
PDF version