3.5. Power supply control

The baseboard system FPGA implements registers and a 4-wire serial interface to the CT1156T2F-S PLD to enable you to:

The voltage control and voltage and current monitoring scheme is shown in simplified form in Figure 3.6.

The serial write data register in the CT1156T2F-S PLD is updated continuously with values from the system registers in the baseboard system FPGA. These values control VOLTAGE_CTRLA and VOLTAGE_CTRLB that set the voltages applied to the ARM1156T2F-S test chip.

The system registers in the baseboard system FPGA are continually updated with voltage and current monitoring values from the serial read data register in the CT1156T2F-S PLD.

The DAC and ADC data values are transferred via the 4-wire serial interface.

Figure 3.6. Voltage control and voltage and current monitoring

Voltage control and voltage and current monitoring

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