A.2.1. Bus interface characteristics

Table A.4 shows the Logic Tile electrical characteristics.

Table A.4. Electrical characteristics for 3.3V I/O

Symbol

Description

Min

Max

Unit

VIH

High-level input voltage

2.0

3.6

V

VIL

Low-level input voltage

0

0.8

V

VOH

High-level output voltage

2.4

-

V

VOL

Low-level output voltage

-

0.4

V

Caution

The Virtex-4 FPGA supports I/O signalling levels that can require VCCO of 1.5V, 1.8V, 2.5V, or 3.3V. Refer to the electrical characteristics section of the Virtex-4 user guide for details on FPGA I/O. See also Variable I/O levels for information on configurable I/O signal levels.

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