ARM® RealView® ESL API v2.0 Developer’s Guide 1.10.1. Using master ports

1.10.1. Using master ports

The following master ports can be created using the sc_port SystemC class:

Table 1.3. sc_port classes

Port type	sc_port definition
Signal master ports	`sc_port<CASISignalIF, 1>`
Transaction master ports	`sc_port<CASITransactionIF, 1>`
Bus master ports	`sc_port<CASITransactionIF, 0>`

Each created master port can communicate with the slave port that is connected to it.

A pointer to any created master port can be obtained by using the findPort() function. For performance reasons, however, it is recommended that you store a pointer for each master point immediately upon creation.

Example 1.4 shows the accessing of memory through a transaction master port.

Example 1.4. Reading from a port

uint64_t addr = 0xFF00;
uint32_t value[1];
uint32_t ctrl = 0;
dram_port->read(addr, value, &ctrl);
cout << "Value " << value << " has been read from address " << addr << endl;

For performance reasons, the read function of the master port does not check whether a slave port has been connected. This must be done once in the interconnect stage only. Therefore master ports provide the getSlaves() function as shown in Example 1.5:

Example 1.5. getSlaves function

if (dram_port->getSlaves() == NULL)
    cout << "Port not connected !" << endl;

The list of connected slave ports returned by the function getSlaves() must be non-NULL. If NULL is returned, the port has not been successfully connected.

AHB master ports

AHB transaction master ports use the dedicated CASIAHBMasterPort class to manage the AMBA protocol. See Appendix B AMBA™ AHB TLM Specification for CASI. the AHB documentation, and the example master and slave ports.

AXI master ports

AXI transaction master ports use the dedicated CASIAXIMasterPort class to manage the AMBA 3 AXI protocol. See Appendix C AMBA^® AXI TLM Specification for CASI, the AXI package documentation for details of the AXI protocol, and the example master and slave ports.

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