Core Tile for ARM1176JZF-S™ User Guide Chapter 4. Test Chip Hardware Description

Chapter 4. Test Chip Hardware Description

This chapter provides details of the ARM1176JZF-S test chip which affect the CT1176JZF-S.

It contains the following sections:

ARM1176JZF-S test chip overview
Memory map
Pin capture block
Clocks
Resets and interrupts
Debug and JTAG configuration

Note

Refer to the ARM1176JZF-S Technical Reference Manual (ARM DDI 0301), CoreSight ETM11 Technical Reference Manual (ARM DDI 0318), Vectored Interrupt Controller Technical Reference Manual (ARM DDI 0273), and the PrimeCell AXI Configurable Interconnect (PL300) Technical Reference Manual (ARM DDI 0354) for further details on the major test chip components.

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