Fast Model Tools User Guide

Version 5.0

Table of Contents

About this book
Intended audience
Typographical conventions
Further reading
Feedback on this product
Feedback on this book
1. Introduction
1.1. About Fast Models
1.1.1. Software requirements
1.1.2. Installation and uninstallation
1.2. Fast Models design flow
1.2.1. Project and repository files
1.2.2. Hierarchical systems
2. Getting Started
2.1. About the tutorial
2.2. Starting System Canvas
2.2.1. Setting up the Fast Model Portfolio
2.3. Creating a sample system
2.4. Adding and configuring components
2.4.1. Adding the ARM processor
2.4.2. Naming components
2.4.3. Hiding ports
2.4.4. Moving ports
2.4.5. Resizing components
2.4.6. Adding additional components
2.4.7. Using port arrays
2.5. Connecting components
2.6. Fast Models files
2.6.1. LISA source
2.6.2. System Canvas file
2.6.3. Fast Models project file
2.7. Viewing the project settings
2.7.1. Specifying the Project Active Configuration
2.7.2. Viewing the top component properties
2.8. Changing the address mapping
2.9. Building the system
2.10. Debugging the system
2.11. Building an ISIM target
2.11.1. Overloading the main() function in the target
2.11.2. Command line switches for the executable target
2.11.3. Debugging the model
3. System Canvas Reference
3.1. Launching System Canvas
3.2. Overview of System Canvas
3.2.1. Menu bar
3.2.2. Toolbar
3.2.3. Workspace windows
3.2.4. Component window
3.2.5. Output window
3.3. Add Existing Files and Add New File dialogs (Component window)
3.3.1. Using environment variables in file names
3.3.2. Assigning libraries and compiler option for platforms
3.4. Add Files (Project menu)
3.5. Add Connection dialog
3.6. Component Instance Properties dialog
3.6.1. Component Model Properties dialog for system
3.7. Component Properties dialog for a library component
3.8. Connection Properties dialog
3.9. Edit Connection dialog
3.10. File/Path Properties dialog
3.11. Find and Replace dialogs
3.12. Label Properties dialog
3.13. New File dialog (from File menu)
3.14. New Project dialogs
3.14.1. Select Top Component LISA File dialog
3.15. Open File dialog
3.16. Port Properties dialog
3.17. Preferences dialog
3.17.1. Appearance
3.17.2. Applications
3.17.3. External Tools
3.17.4. Fonts
3.17.5. Default Model Repository
3.17.6. Suppressed Messages
3.17.7. Verbose Messages
3.18. Project Settings dialog
3.18.1. Project top-level settings
3.18.2. Parameters category
3.18.3. Alphabetical list of project parameter IDs
3.18.4. Project file contents
3.19. Protocol Properties dialog
3.20. Self Port dialog
4. Debugging
4.1. About debugging
4.2. Batch mode debugging
4.2.1. Direct execution
4.2.2. Debug server
4.3. Debugging from System Canvas
4.3.1. Configuring Model Debugger
4.3.2. Using RealView Debugger
4.4. Using other debuggers to debug LISA source
4.4.1. Model generation requirements
4.4.2. Debugging with GDB
4.4.3. Debugging with Visual Studio
5. SystemC Export
5.1. About SystemC export
5.2. Building a SystemC component from System Canvas
5.2.1. Adding header files and libraries for Linux export
5.2.2. Adding header files and libraries for Windows export
5.3. Adding the generated SystemC component to a SystemC system
5.4. Using the generated ports
5.4.1. Protocol definition
5.4.2. Properties for TLM1.0 based protocols
5.4.3. Properties for TLM 2.0 based protocols
5.5. Example systems
5.5.1. Running the examples with debug support
5.5.2. Dhrystone example
5.5.3. Dhrystone2 example
5.5.4. DMA example
5.5.5. LinuxSystem example
5.5.6. Protocols example
5.6. SystemC component API
5.6.1. Component access function
5.6.2. Parameter access functions
5.6.3. Simulation control functions
5.6.4. Application loading functions
5.6.5. Debug control functions
5.6.6. Accessing the CADI interface directly
5.7. Overview of the master scheduler
5.7.1. Standalone simulation without a debug server
5.7.2. Simulation with a debug server
5.8. Limitations
5.8.1. Single SC_THREAD and wait() calls
5.8.2. Single SC_THREAD and problems with re-entrancy
5.8.3. Calling wait() in the middle of a transaction
5.8.4. Timing annotation
5.8.5. Code translation support for external memory
5.8.6. Debug accesses
6. Creating a New Component
6.1. Basic configuration
6.1.1. Create a new LISA file
6.1.2. Resources section
6.2. Adding ports
6.3. Behavior section
6.3.1. View the SerialData protocol
6.3.2. Adding the new behavior to the SerialCharDoubler slave port
6.3.3. Master port
6.3.4. Special purpose behaviors
6.4. Using the SerialCharDoubler component in the system
A. Building and Running the EB RTSM Example System
A.1. Using System Canvas to build the platform model
A.1.1. Building an EB Real-Time System Model
A.1.2. Packaging the system model for distribution
A.2. Connecting to the model
A.2.1. Using Model Shell to run the system model
A.2.2. Using Model Debugger to run a system model
A.2.3. Using RealView Debugger to run a system model
A.3. Running an application on the system model
A.3.1. Running the brot application in Model Debugger
A.3.2. Running the brot application in RealView Debugger
A.3.3. Using the CLCD window
B. Red Hat Linux Dependencies
B.1. About dependencies
B.2. Dependencies for Red Hat version 4.4
B.3. Dependencies for Red Hat version 5
C. Building System Models in Batch Mode
C.1. Introduction
C.2. SIMGEN command-line options
C.2.1. Using command-line options to decrease compilation time
C.2.2. Interaction between num-comps-file and num-build-cpus
C.2.3. Setting command-line parameters from System Canvas

List of Figures

1.1. Fast Models design flow
1.2. Project organization
1.3. EB_1176 system
1.4. EmulationBaseboard component
1.5. Clock divider component external ports
2.1. System Canvas at startup
2.2. Preferences dialog, Setup Default Model Repository
2.3. Add Model Repository File dialog
2.4. New project dialog
2.5. Select Top Component LISA File dialog
2.6. ARMCortexA8CT core component in the Block Diagram window
2.7. Rename component
2.8. Processor component after changes
2.9. Port context menu
2.10. Example system with added components
2.11. Connected components
2.12. Project settings for the example
2.13. Select Components dialog showing available components
2.14. Viewing the address Mapping from the Port Properties dialog
2.15. Edit Connection dialog
2.16. Edit address map for slave port
2.17. Build process output
2.18. Configuring Model Parameters dialog
2.19. Select Targets dialog
2.20. Model Debugger Application Input window
2.21. Build Integrated Simulator target
2.22. Specifying user-defined main() option
3.1. Layout of System Canvas
3.2. Add New File dialog
3.3. Add Existing Files dialog
3.4. Add Files dialog
3.5. Add Connection dialog
3.6. Component Instance Properties dialog, General tab
3.7. Component Instance Properties dialog, Properties tab
3.8. Component Instance Properties dialog, Parameters tab
3.9. Component Instance Properties dialog, Ports tab
3.10. Component Instance Properties dialog, Methods tab
3.11. Component Model Properties dialog
3.12. Component Model Properties dialog, Properties tab
3.13. Component Model Properties dialog, Parameters tab
3.14. Add Component Parameter dialog
3.15. Component Model Properties dialog, Ports tab
3.16. Component Properties dialog for SerialCharDoubler
3.17. Component Properties dialog, Properties tab
3.18. Component Properties dialog, Parameters tab
3.19. Component Properties dialog, Ports tab
3.20. Component Properties dialog, Methods tab
3.21. Connection Properties dialog
3.22. Add/Edit Connection Mapping dialog
3.23. File/Path Properties dialog, General tab
3.24. File/Path Properties dialog, Build actions tab
3.25. Find dialog
3.26. Find and Replace dialog
3.27. Label Properties dialog
3.28. New File dialog
3.29. New Project dialog
3.30. Select Top Component LISA File dialog
3.31. Open File dialog
3.32. Port Properties dialog
3.33. Preferences dialog
3.34. Preferences dialog, Applications
3.35. Preferences, Applications for Linux
3.36. Preferences dialog, External Tools
3.37. Preferences dialog, Fonts
3.38. Preferences dialog, Model Repository
3.39. Add Model Repository File
3.40. Preferences dialog, Suppressed Messages
3.41. Preferences dialog, Verbose Messages
3.42. Project Settings dialog
3.43. Project Settings dialog, Category View top level
3.44. Project Settings dialog, Category View Targets
3.45. Project Settings dialog, Category View Debugging
3.46. Project Settings dialog, Category View Sim Generator
3.47. Project Settings dialog, Category View Compiler
3.48. Project Settings dialog, Category View Linker
3.49. Project Settings dialog, List View
3.50. Project Settings dialog, Tree View
3.51. Protocol Properties dialog for SerialData
3.52. Self Port dialog
4.1. Direct execution use case
4.2. Debug server use case
4.3. Configure Model Parameters dialog
4.4. Select Targets dialog
4.5. Load application for core
4.6. Dual core system running in Model Debugger
4.7. Model Debugger paths in the Preferences dialog
5.1. Scheduling between Fast Models and SystemC domains
5.2. Port wrappers connect Fast Models and SystemC components
5.3. SGSignal component in System Canvas
5.4. CADI client and server connects Model Debugger and system
5.5. Dhrystone system example
5.6. Dhrystone2 system example
5.7. DMA system example
5.8. LinuxSystem example
5.9. Protocols example
5.10. Simulation without a debug server
5.11. Standalone simulation with a debug server
5.12. SC_THREAD wrapper for exported components
5.13. Blocking transactions in single SC_THREAD
5.14. Calling wait() in the middle of a transaction
5.15. Transaction issued by EVP
5.16. Transaction issued by SystemC
5.17. Local modification of external memory
5.18. Debug accesses from a SystemC component
6.1. Character doubler component
6.2. Self Port dialog
6.3. Select Protocol dialog
6.4. SerialCharDoubler inserted in dual core system
6.5. Linux booting with SerialCharDoubler component
A.1. Model Debugger Connect remote dialog
A.2. Model Debugger Select Targets dialog
A.3. Configure Model Parameters dialog
A.4. CLCD window
A.5. Breakpoint in brot.c
A.6. CLCD window at startup
A.7. CLCD window alternative display

Proprietary Notice

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Neither the whole nor any part of the information contained in, or the product described in, this document may be adapted or reproduced in any material form except with the prior written permission of the copyright holder.

The product described in this document is subject to continuous developments and improvements. All particulars of the product and its use contained in this document are given by ARM in good faith. However, all warranties implied or expressed, including but not limited to implied warranties of merchantability, or fitness for purpose, are excluded.

This document is intended only to assist the reader in the use of the product. ARM Limited shall not be liable for any loss or damage arising from the use of any information in this document, or any error or omission in such information, or any incorrect use of the product.

Where the term ARM is used it means “ARM or any of its subsidiaries as appropriate”.

Confidentiality Status

This document is Non-Confidential. The right to use, copy and disclose this document may be subject to license restrictions in accordance with the terms of the agreement entered into by ARM and the party that ARM delivered this document to.

Unrestricted Access is an ARM internal classification.

Product Status

The information in this document is final, that is for a developed product.

Revision History
Revision AAugust 2007New document.
Revision BDecember 2007Release 3.1.
Revision CFebruary 2008Release 3.2.
Revision DJune 2008Update for System Generator 4.0.
Revision EAugust 2008Update for System Generator 4.0 SP1.
Revision FDecember 2008Update for Fast Models 4.1.
Revision GMarch 2009Update for Fast Models 4.2. New SystemC and TLM 2.0 features.
Revision HApril 2009Update for Fast Models 5.0.
Copyright © 2007-2009 ARM Limited. All rights reserved.ARM DUI 0370H