A.3.4 Using the CLCD window

The CLCD window appears when the FVP starts.

This window represents the contents of the simulated color LCD framebuffer. It automatically resizes to match the horizontal and vertical resolution set in the CLCD peripheral registers.
Figure A-6 CLCD window at startup
CLCD window at startup

USERSW
Eight white boxes show the state of the EB User DIP switches.
These represent switch S6 on the EB hardware, USERSW[8:1], that maps to bits [7:0] of the SYS_SW register at address 0x10000004.
The switches are in the off position by default. Click in the area above or below a white box to change its state.
BOOTSW
Eight white boxes showing the state of the EB Boot DIP switches.
These represent switch S8 on the EB hardware, BOOTSEL[8:1], that maps to bits [15:8] of the SYS_SW register at address 0x100000004.
The switches are in the off position by default.

Note

ARM recommends you configure the Boot DIP switches using the boot_switch model parameter rather than by using the CLCD interface.
Changing Boot DIP switch positions while the model is running can result in unpredictable behavior.
S6LED
Eight colored boxes indicate the state of the EB User LEDs.
These represent LEDs D[21:14] on the EB hardware, which map to bits [7:0] of the SYS_LED register at address 0x10000008. The boxes correspond to the red/yellow/green LEDs on the EB hardware.
Total Instr
A counter showing the total number of instructions executed.
The system models provide a programmer’s view of the system, so the CLCD displays total instructions rather than total processor cycles. Timing might differ substantially from the hardware because the models:
  • Simplify the bus fabric.
  • Minimize memory latencies.
  • Are cycle approximate.
In general, bus transaction timing is consistent with the hardware, but timing of operations within the model is not accurate.
Total Time
A counter showing the total elapsed time, in seconds.
This is wall clock time, not simulated time.
Rate Limit
A feature that disables or enables a rate limit. The system model is highly optimized, so your code might run faster than it would on real hardware. This might cause timing issues.
Rate Limit ON restricts the simulation time so that it more closely matches real time. Click on the square button to disable Rate Limit. The text changes from ON to OFF and the colored box darkens.

Note

The rate_limit-enable parameter controls this setting when instantiating the model.
If you click on the Total Instr or Total Time items in the CLCD, the display changes to show two different items. Click on the items again to toggle between the displays.
Figure A-7 CLCD window alternative display
CLCD window alternative display

Instr/sec
the number of instructions executed per second of wall clock time.
Perf Index
the ratio of real time to simulation time. The larger the ratio, the faster the simulation runs. If you enable Rate Limit, the Perf Index approaches unity.
You can reset the simulation counters by resetting the model.
If the CLCD window has focus, it translates:

Note

The simulator only sends relative mouse motion events to the model. As a result, the host mouse pointer does not necessarily align with the target OS mouse pointer.
You can hide the host mouse pointer by pressing the Left Ctrl+Left Alt keys. Press the keys again to redisplay the host mouse pointer. The Right Ctrl key does not have this effect.
If you prefer to use a different key, use the trap_key configuration option.
Related information
Example Peripheral Components, Fast Models Reference Manual
EBVisualisation - parameters, Fast Models Reference Manual
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