5.8.1 SystemC Export limitation on re-entrancy

Only processor models support re-entrancy.

Re-entrancy occurs when a component in an EVS issues a blocking transaction to a SystemC peripheral that in turn generates another blocking transaction back into the same component. This generation might come directly or indirectly from a call to wait() or by another SystemC peripheral.
Virtual platforms including EVSs that comprise a processor model do support such re-entrancy.
However, no other fast models support re-entrancy. For these models, the virtual platform might show unpredictable behavior because of racing within the EVS component.
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