| Behavior | Each LISA+ component or protocol can have multiple
behavior sections. These sections describe the behavior code in
C. |
| Component | An individual sub-system element such as core,
memory, bus, or peripheral, or a complete system or sub-system. |
| Connection | A link between two components. The connection
is made between a master port on one component and a slave port
on the second component. |
| Code translation | Instruction set simulation technology. Functional
accuracy and execution speed are key performance criteria. |
| CT core | A model of an ARM processor that makes use
of code translation technology. CT core models translate ARM instructions
on the fly and cache the translation to enable fast execution of
ARM code. |
| External port | A port that is used to connect the subsystem
to other components within a higher-level system. |
| Internal port | Internal ports communicate with subcomponents
and are not visible if the component is used in a higher-level system.
Unlike hidden external ports, they are permanently hidden. |
| Protocol | A protocol defines ports in components that
use the protocol to communicate with other components. Ports must
use the same protocol if they are to be connected. |
| Resource | A section that allows private C/C++ variables,
such as registers, to be declared within a component. These variables
can be exposed if required. |
PDF version