4.45 Implementation of Vector Floating-Point (VFP) support code

For convenience, an implementation of VFP support code that can be used in your system is provided with your installation of the ARM compilation tools.

The support code comprises:
  • The libraries vfpsupport.l and vfpsupport.b for emulating VFP operations bounced by the hardware.
    These files are located in the \lib\armlib subdirectory of your installation.
  • C source code and assembly language source code implementing top-level, second-level and user-level interrupt handlers.
    These files can be found in the vfpsupport subdirectory of the Examples directory of your ARM compilation tools distribution at install_directory\Examples\...\vfpsupport.
    These files might require modification to integrate VFP support with your operating system.
  • C source code and assembly language source code for accessing subarchitecture functionality of VFP coprocessors.
    These files are located in the vfpsupport subdirectory of the Examples directory of your ARM compilation tools distribution at install_directory\Examples\...\vfpsupport.
When the VFP coprocessor bounces an instruction, an Undefined Instruction exception is signaled to the processor and the VFP support code is entered through the Undefined Instruction vector. The top-level and second-level interrupt handlers perform some initial processing of the signal, for example, ensuring that the exception is not caused by an illegal instruction. The user-level interrupt handler then calls the appropriate library function in the library vfpsupport.l or vfpsupport.b to emulate the VFP operation in software.

Note

You do not have to use VFP support code:
  • When building with --fpmode=std.
  • When no trapping of uncommon or exceptional cases is required.
  • When the VFP coprocessor is operating in RunFast mode.
  • When the hardware coprocessor is a VFPv3-based system.
Related concepts
4.40 Compiler support for floating-point arithmetic
4.41 Default selection of hardware or software floating-point support
4.42 Example of hardware and software support differences for floating-point arithmetic
4.43 Vector Floating-Point (VFP) architectures
4.44 Limitations on hardware handling of floating-point arithmetic
4.46 Compiler and library support for half-precision floating-point numbers
4.47 Half-precision floating-point number format
4.48 Compiler support for floating-point computations and linkage
4.49 Types of floating-point linkage
4.50 Compiler options for floating-point linkage and computations
Related reference
4.51 Floating-point linkage and computational requirements of compiler options
4.52 Processors and their implicit Floating-Point Units (FPUs)
7.65 --fpmode=model
Related information
ARM Application Note 133 - Using VFP with RVDS
Non-ConfidentialPDF file icon PDF versionARM DUI0375E
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