These restrictions are as follows:
CBNZ instructions are not supported.
In some cases, the compiler can replace
IT blocks with branched
The instruction width specifier
.N denotes a preference, but not a
requirement, to the compiler. This is because, in rare cases, optimizations and register
allocation can make it inefficient to generate a 16-bit encoding.
For ARMv6 and lower architectures, the inline assembler does not assemble any Thumb
instructions. Instead, on finding inline assembly while in Thumb state, the compiler
switches to ARM state automatically. Code that relies on this switch is currently supported,
but this practise is deprecated. For ARMv6T2 and higher, the automatic switch from Thumb to
ARM state is made if the code is valid ARM assembly but not Thumb.
ARM state can be set deliberately. Inline assembly language can be included in a source
file that contains code to be compiled for Thumb in ARMv6 and lower, by enclosing the
functions containing inline assembly code between
#pragma arm and
#pragma thumb statements. For example:
... // Thumb code
#pragma arm // ARM code. Switch code generation to the ARM instruction set so
// that the inline assembler is available for Thumb in ARMv6 and lower.
int add(int i, int j)
ADD res, i, j // add here
#pragma thumb // Thumb code. Switch back to the Thumb instruction set.
// The inline assembler is no longer available for Thumb in ARMv6 and
The code must also be compiled using the
--apcs /interwork compiler