Non-Confidential | PDF version | ARM DUI0375E | ||

| ||||

Home > ARMv6 SIMD Instruction Intrinsics > ARMv6 SIMD intrinsics by prefix |

The following table shows the intrinsics according to prefix name.

Each intrinsic's prefix indicates the type of arithmetic performed, as follows:

`__s`

, signed.`__q`

, signed saturating.`__sh`

, signed halving.`__u`

, unsigned.`__uq`

, unsigned saturating.`__uh`

, unsigned halving.

The

`__sel()`

intrinsic falls outside the classifications shown in the
table. This intrinsic selects bytes according to GE bit values.**Table 12-1 ARMv6 SIMD intrinsics by prefix**

ARMv6 SIMD instruction intrinsics grouped by prefix | ||||||
---|---|---|---|---|---|---|

Intrinsic classification | `__s` |
`__q` |
`__sh` |
`__u` |
`__uq` |
`__uh` |

Byte addition | `__sadd8` |
`__qadd8` |
`__shadd8` |
`__uadd8` |
`__uqadd8` |
`__uhadd8` |

Byte subtraction | `__ssub8` |
`__qsub8` |
`__shsub8` |
`__usub8` |
`__uqsub8` |
`__uhsub8` |

Halfword addition | `__sadd16` |
`__qadd16` |
`__shadd16` |
`__uadd16` |
`__uqadd16` |
`__uhadd16` |

Halfword subtraction | `__ssub16` |
`__qsub16` |
`__shsub16` |
`__usub16` |
`__uqsub16` |
`__uhsub16` |

Exchange halfwords within one operand, add high halfwords, subtract low halfwords | `__sasx` |
`__qasx` |
`__shasx` |
`__uasx` |
`__uqasx` |
`__uhasx` |

Exchange halfwords within one operand, subtract high halfwords, add low halfwords | `__ssax` |
`__qsax` |
`__shsax` |
`__usax` |
`__uqsax` |
`__uhsax` |

Unsigned sum of absolute difference | - | - | - | `__usad8` |
- | - |

Unsigned sum of absolute difference and accumulate | - | - | - | `__usada8` |
- | - |

Saturation to selected width | `__ssat16` |
- | - | `__usat16` |
- | - |

Extract values (bit positions [23:16][7:0]), zero-extend to 16 bits | - | - | - | `__uxtb16` |
- | - |

Extract values (bit positions [23:16][7:0]) from second operand, zero-extend to 16 bits, add to first operand | - | - | - | `__uxtab16` |
- | - |

Sign-extend | `__sxtb16` |
- | - | - | - | - |

Sign-extend, add | `__sxtab16` |
- | - | - | - | - |

Signed multiply, add products | `__smuad` |
- | - | - | - | - |

Exchange halfwords of one operand, signed multiply, add products | `__smuadx` |
- | - | - | - | - |

Signed multiply, subtract products | `__smusd` |
- | - | - | - | - |

Exchange halfwords of one operand, signed multiply, subtract products | `__smusdx` |
- | - | - | - | - |

Signed multiply, add both results to another operand | `__smlad` |
- | - | - | - | - |

Exchange halfwords of one operand, perform 2x16-bit multiplication, add both results to another operand | `__smladx` |
- | - | - | - | - |

Perform 2x16-bit multiplication, add both results to another operand | `__smlald` |
- | - | - | - | - |

Exchange halfwords of one operand, perform 2x16-bit multiplication, add both results to another operand | `__smlaldx` |
- | - | - | - | - |

Perform 2x16-bit signed multiplications, take difference of products, subtracting high halfword product from low halfword product, and add difference to a 32-bit accumulate operand | `__smlsd` |
- | - | - | - | - |

Exchange halfwords of one operand, perform two signed 16-bit multiplications, add difference of products to a 32-bit accumulate operand | `__smlsdx` |
- | - | - | - | - |

Perform 2x16-bit signed multiplications, take difference of products, subtracting high halfword product from low halfword product, add difference to a 64-bit accumulate operand | `__smlsld` |
- | - | - | - | - |

Exchange halfwords of one operand, perform 2x16-bit multiplications, add difference of products to a 64-bit accumulate operand | `__smlsldx` |
- | - | - | - | - |