12.14 __sel intrinsic

This intrinsic inserts a SEL instruction into the instruction stream generated by the compiler.

It enables you to select bytes from the input parameters, whereby the bytes that are selected depend on the results of previous SIMD instruction intrinsics. The results of previous SIMD instruction intrinsics are represented by the Greater than or Equal flags in the APSR.
The __sel intrinsic works equally well on both halfword and byte operand intrinsic results. This is because halfword operand operations set two (duplicate) GE bits per value. For example, the __sasx intrinsic.

Syntax

unsigned int __sel(unsigned int val1, unsigned int val2)
Where:
val1
holds four selectable bytes
val2
holds four selectable bytes.

Return value

The __sel intrinsic selects bytes from the input parameters and returns them in the return value, res, according to the following criteria:
if APSR.GE[0] == 1 then res[7:0] = val1[7:0] else res[7:0] = val2[7:0]
if APSR.GE[1] == 1 then res[15:8] = val1[15:8] else res[15:8] = val2[15:8]
if APSR.GE[2] == 1 then res[23:16] = val1[23:16] else res[23:16] = val2[23:16]
if APSR.GE[3] == 1 then res[31:24] = val1[31:24] else res = val2[31:24]

Examples

unsigned int ge_filter(unsigned int val1, unsigned int val2)
{
    unsigned int res;
    res = __sel(val1,val2); 
    return res;
}
unsigned int foo(unsigned int a, unsigned int b)
{
    int res;
    int filtered_res;
    res = __sasx(a,b);  /* This intrinsic sets the GE flags */
    filtered_res = ge_filter(res); /* Filter the results of the __sasx */
                                   /* intrinsic. Some results are filtered */
                                   /* out based on the GE flags. */
    return filtered_res;
}
Related reference
9.143 ARMv6 SIMD intrinsics
12.11 __sadd16 intrinsic
12.13 __sasx intrinsic
12.34 __ssax intrinsic
12.36 __ssub8 intrinsic
12.35 __ssub16 intrinsic
Related information
SEL
ARM and Thumb instruction summary
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