12.27 __smlsld intrinsic

This intrinsic inserts an SMLSLD instruction into the instruction stream generated by the compiler.

It enables you to perform two 16-bit signed multiplications, take the difference of the products, subtracting the high halfword product from the low halfword product, and add the difference to a 64-bit accumulate operand. Overflow cannot occur during the multiplications or the subtraction. Overflow can occur as a result of the 64-bit addition, and this overflow is not detected. Instead, the result wraps round to modulo 264.


unsigned long long __smlsld(unsigned int val1, unsigned int val2, unsigned long long val3)
holds the first halfword operands for each multiplication
holds the second halfword operands for each multiplication
holds the accumulate value.

Return value

The __smlsld intrinsic returns the difference of the product of each multiplication, added to the accumulate value.


unsigned long long dual_multiply_diff_prods(unsigned int val1, unsigned int val2, unsigned long long val3)
    unsigned int res;
    res = __smlsld(val1,val2,val3); /* p1 = val1[15:0] × val2[15:0]
                                       p2 = val1[31:16] × val2[31:16]
                                       res[63:0] = p1 - p2 + val3[63:0]
    return res;
Related reference
9.143 ARMv6 SIMD intrinsics
Related information
ARM and Thumb instruction summary
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