12.35 __ssub16 intrinsic

This intrinsic inserts an SSUB16 instruction into the instruction stream generated by the compiler.

It enables you to perform two 16-bit signed integer subtractions.
The GE bits in the APSR are set according to the results.

Syntax

unsigned int __ssub16(unsigned int val1, unsigned int val2)
Where:
val1
holds the first operands of each subtraction in the low and the high halfwords
val2
holds the second operands for each subtraction in the low and the high halfwords.

Return value

The __ssub16 intrinsic returns:
  • The subtraction of the low halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value.
  • The subtraction of the high halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.
Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation. If res is the return value, then:
  • If res[15:0] ≥ 0 then APSR.GE[1:0] = 11 else 00.
  • If res[31:16] ≥ 0 then APSR.GE[3:2] = 11 else 00.

Examples

unsigned int subtract halfwords(unsigned int val1, unsigned int val2)
{
    unsigned int res;
    res = __ssub16(val1,val2); /* res[15:0] = val1[15:0] - val2[15:0]
                                  res[31:16] = val1[31:16] - val2[31:16]
                                */
    return res;
}
Related reference
9.143 ARMv6 SIMD intrinsics
12.14 __sel intrinsic
Related information
SSUB16
ARM and Thumb instruction summary
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