12.36 __ssub8 intrinsic

This intrinsic inserts an SSUB8 instruction into the instruction stream generated by the compiler.

It enables you to perform four 8-bit signed integer subtractions.
The GE bits in the APSR are set according to the results.

Syntax

unsigned int __ssub8(unsigned int val1, unsigned int val2)
Where:
val1
holds the first four 8-bit operands of each subtraction
val2
holds the second four 8-bit operands of each subtraction.

Return value

The __ssub8 intrinsic returns:
  • The subtraction of the first byte in the second operand from the first byte in the first operand, in the first bytes of the return value.
  • The subtraction of the second byte in the second operand from the second byte in the first operand, in the second byte of the return value.
  • The subtraction of the third byte in the second operand from the third byte in the first operand, in the third byte of the return value.
  • The subtraction of the fourth byte in the second operand from the fourth byte in the first operand, in the fourth byte of the return value.
Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation. If res is the return value, then:
  • If res[8:0] ≥ 0 then APSR.GE[0] = 1 else 0.
  • If res[15:8] ≥ 0 then APSR.GE[1] = 1 else 0.
  • If res[23:16] ≥ 0 then APSR.GE[2] = 1 else 0.
  • If res[31:24] ≥ 0 then APSR.GE[3] = 1 else 0.

Examples

unsigned int subtract bytes(unsigned int val1, unsigned int val2)
{
    unsigned int res;
    res = __ssub8(val1,val2); /* res[7:0] = val1[7:0] - val2[7:0]
                                 res[15:8] = val1[15:8] - val2[15:8]
                                 res[23:16] = val1[23:16] - val2[23:16]
                                 res[31:24] = val1[31:24] - val2[31:24]
                               */
    return res;
}
Related reference
9.143 ARMv6 SIMD intrinsics
12.14 __sel intrinsic
Related information
SSUB8
ARM and Thumb instruction summary
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