12.41 __uasx intrinsic

This intrinsic inserts a UASX instruction into the instruction stream generated by the compiler.

It enables you to exchange the two halfwords of the second operand, add the high halfwords and subtract the low halfwords.
The GE bits in the APSR are set according to the results.

Syntax

unsigned int __uasx(unsigned int val1, unsigned int val2)
Where:
val1
holds the first operand for the subtraction in the low halfword, and the first operand for the addition in the high halfword
val2
holds the second operand for the subtraction in the high halfword and the second operand for the addition in the low halfword.

Return value

The __uasx intrinsic returns:
  • The subtraction of the high halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value.
  • The addition of the high halfword in the first operand and the low halfword in the second operand, in the high halfword of the return value.
Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation. If res is the return value, then:
  • If res[15:0] ≥ 0 then APSR.GE[1:0] = 11 else 00.
  • If res[31:16] ≥ 0x10000 then APSR.GE[3:2] = 11 else 00.

Examples

unsigned int exchange_add_subtract(unsigned int val1, unsigned int val2)
{
    unsigned int res;
    res = __uasx(val1,val2); /* res[15:0] = val1[15:0] - val2[31:16]
                                res[31:16] = val1[31:16] + val2[15:0]
                              */
    return res;
}
Related reference
9.143 ARMv6 SIMD intrinsics
Related information
UASX
ARM and Thumb instruction summary
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