6.11 Inline assembler Vector Floating-Point (VFP) restrictions in C and C++ code

The inline assembler provides direct support for VFPv2 instructions.

For example:
float foo(float f, float g)
  float h;
      VADD h, f, 0.5*g; // h = f + 0.5*g
  return h;
If you change the FPSCR register using inline assembly code, it produces runtime effects on the inline VFP code and on subsequent compiler-generated VFP code.


  • Do not use inline assembly code to change VFP vector mode. Inline assembly code must not be used for this purpose, and VFP vector mode is deprecated.
  • ARM strongly discourages the use of inline assembly coprocessor instructions to interact with VFP in any way.
Related concepts
6.7 Restrictions on inline assembly operations in C and C++ code
6.8 Inline assembler register restrictions in C and C++ code
6.9 Inline assembler processor mode restrictions in C and C++ code
6.10 Inline assembler Thumb instruction set restrictions in C and C++ code
6.12 Inline assembler instruction restrictions in C and C++ code
6.13 Miscellaneous inline assembler restrictions in C and C++ code
4.41 Compiler support for floating-point arithmetic
Related information
VMOV (between one ARM register and single precision VFP)
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