12.28 __smlsldx intrinsic

This intrinsic inserts an SMLSLDX instruction into the instruction stream generated by the compiler.

It enables you to exchange the halfwords of the second operand, perform two 16-bit multiplications, adding the difference of the products to a 64-bit accumulate operand. Overflow cannot occur during the multiplications or the subtraction. Overflow can occur as a result of the 64-bit addition, and this overflow is not detected. Instead, the result wraps round to modulo 264.


unsigned long long __smlsldx(unsigned int val1, unsigned int val2, unsigned long long val3)
holds the first halfword operands for each multiplication
holds the second halfword operands for each multiplication
holds the accumulate value.

Return value

The __smlsld intrinsic returns the difference of the product of each multiplication, added to the accumulate value.


unsigned long long dual_multiply_diff_prods(unsigned int val1, unsigned int val2, unsigned long long val3)
    unsigned int res;
    res = __smlsld(val1,val2,val3); /* p1 = val1[15:0] × val2[31:16]
                                       p2 = val1[31:16] × val2[15:0]
                                       res[63:0] = p1 - p2 + val3[63:0]
    return res;
Related reference
9.144 ARMv6 SIMD intrinsics
Related information
ARM and Thumb instruction summary
Non-ConfidentialPDF file icon PDF versionARM DUI0375F
Copyright © 2007, 2008, 2011, 2012, 2014 ARM. All rights reserved.