The branch instruction
BL is PC-relative and has a limited branch range. The range of a
BL instruction is 32MB for ARM instructions.
Processors that support Thumb-2 technology have a range of 16MB. Processors that do
not support Thumb-2 technology have a range of 4MB.
When a branch involves a destination beyond the
branching range of the
BL instruction, armlink must generate a veneer. The veneer then sets
the PC to the destination address. This enables the veneer to branch anywhere in the
4GB address space. If the veneer is inserted between ARM and Thumb code, the veneer
also handles the instruction set state change.
The linker can generate the following veneer types depending on what is required:
Short branch veneers.
Long branch veneers.
armlink creates one input section called
for each veneer. A veneer is generated only if no other existing veneer can satisfy the
requirements. If two input sections contain a long branch to the same destination, only one
veneer is generated that is shared by both branch instructions. A veneer is only shared in
this way if it can be reached by both sections.
If you are using ARMv4T, armlink generates veneers when a branch involves change of state
between ARM and Thumb®. You still get
interworking veneers for ARMv5TE and later when using conditional branches, because
there is no conditional
BL instruction. Veneers for
state changes are also required for
in ARMv5 and later.
NoteIf execute-only (XO) sections are present, only XO-compliant veneer code is
created in XO regions.