4.14 Load and store multiple register instructions in ARM and Thumb

Instructions are available in both the ARM and Thumb instruction sets to load and store multiple registers.

They are:
LDM
Load Multiple registers.
STM
Store Multiple registers.
PUSH
Store multiple registers onto the stack and update the stack pointer.
POP
Load multiple registers off the stack, and update the stack pointer.
In LDM and STM instructions:
  • The list of registers loaded or stored can include:
    • In A32 instructions, any or all of R0-R12, SP, LR, and PC.
    • In 32-bit T32 instructions, any or all of R0-R12, and optionally LR or PC (LDM only) with some restrictions.
    • In 16-bit T32 instructions, any or all of R0-R7.
  • The address must be word-aligned. It can be:
    • Incremented after each transfer.
    • Incremented before each transfer (A32 instructions only).
    • Decremented after each transfer (A32 instructions only).
    • Decremented before each transfer (not in 16-bit encoded T32 instructions).
  • The base register can be either:
    • Updated to point to the next block of data in memory.
    • Left as it was before the instruction.
When the base register is updated to point to the next block in memory, this is called writeback, that is, the adjusted address is written back to the base register.
In PUSH and POP instructions:
  • The stack pointer (SP) is the base register, and is always updated.
  • The address is incremented after each transfer in POP instructions, and decremented before each transfer in PUSH instructions.
  • The list of registers loaded or stored can include:
    • In A32 instructions, any or all of R0-R12, SP, LR, and PC.
    • In 32-bit T32 instructions, any or all of R0-R12, and optionally LR or PC (POP only) with some restrictions.
    • In 16-bit T32 instructions, any or all of R0-R7, and optionally LR (PUSH only) or PC (POP only).

Note

Use of SP in the list of registers in these ARM instructions is deprecated.
ARM STM and PUSH instructions that use PC in the list of registers, and ARM LDM and POP instructions that use both PC and LR in the list of registers are deprecated.
Related concepts
4.13 Load and store multiple register instructions
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