10.24 BXJ

Branch and change to Jazelle state.


BXJ{cond} Rm
is an optional condition code. cond is not available on all forms of this instruction.
is a register containing an address to branch to.


The BXJ instruction causes a branch to the address contained in Rm and changes the instruction set state to Jazelle.

Instruction availability and branch ranges

The following table shows the BXJ instructions that are available in ARM and Thumb state. Instructions that are not shown in this table are not available. Notes in brackets show the first architecture version where the instruction is available.

Table 10-9 BXJ instruction availability and range

Instruction ARM   Thumb, 16-bit encoding Thumb, 32-bit encoding
BXJ Rm Available (5J, 6) -   Available (All T2 except ARMv7-M)
BXJ{cond} Rm Available (5J, 6) -   - -

Register restrictions

You can use SP for Rm in the BXJ ARM instruction but this is deprecated in ARMv6T2 and above.
You cannot use SP in the BXJ Thumb instruction.

Condition flags

The BXJ instruction does not change the flags.


See the preceding table for details of availability of the BXJ instruction in each architecture.
Related concepts
7.5 Register-relative and PC-relative expressions
Related reference
10.8 Condition code suffixes
Related information
Information about image structure and generation
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