10.40 LDC and LDC2

Transfer Data from memory to Coprocessor.

Syntax

op{L}{cond} coproc, CRd, [Rn]
op{L}{cond} coproc, CRd, [Rn, #{-}offset] ; offset addressing
op{L}{cond} coproc, CRd, [Rn, #{-}offset]! ; pre-index addressing
op{L}{cond} coproc, CRd, [Rn], #{-}offset ; post-index addressing
op{L}{cond} coproc, CRd, label
op{L}{cond} coproc, CRd, [Rn], {option}
where:
op
is LDC or LDC2.
cond
is an optional condition code.
In ARM code, cond is not permitted for LDC2.
L
is an optional suffix specifying a long transfer.
coproc
is the name of the coprocessor the instruction is for. The standard name is pn, where n is an integer in the range 0 to 15.
CRd
is the coprocessor register to load.
Rn
is the register on which the memory address is based. If PC is specified, the value used is the address of the current instruction plus eight.
-
is an optional minus sign. If - is present, the offset is subtracted from Rn. Otherwise, the offset is added to Rn.
offset
is an expression evaluating to a multiple of 4, in the range 0 to 1020.
!
is an optional suffix. If ! is present, the address including the offset is written back into Rn.
label
is a word-aligned PC-relative expression.
label must be within 1020 bytes of the current instruction.
option
is a coprocessor option in the range 0-255, enclosed in braces.

Usage

The use of these instructions depends on the coprocessor. See the coprocessor documentation for details.

Architectures

LDC is available in all versions of the ARM architecture.
LDC2 is available in ARMv5T and above.
These 32-bit Thumb instructions are available in ARMv6T2 and above.
There are no 16-bit versions of these instructions in Thumb.

Register restrictions

You cannot use PC for Rn in the pre-index and post-index instructions. These are the forms that write back to Rn.
Related concepts
7.5 Register-relative and PC-relative expressions
6.16 Address alignment
Related reference
10.8 Condition code suffixes
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