10.52 MCRR and MCRR2

Move to Coprocessor from ARM Registers. Depending on the coprocessor, you might be able to specify various additional operations.

Syntax

MCRR{cond} coproc, #opcode, Rt, Rt2, CRn
MCRR2{cond} coproc, #opcode, Rt, Rt2, CRn
where:
cond
is an optional condition code. In ARM code, cond is not permitted for MCRR2.
coproc
is the name of the coprocessor the instruction is for. The standard name is pn, where n is an integer in the range 0 to 15.
opcode
is a 4-bit coprocessor-specific opcode.
Rt, Rt2
are ARM source registers. Rt and Rt2 must not be PC.
CRn
is a coprocessor register.

Usage

The use of these instructions depends on the coprocessor. See the coprocessor documentation for details.

Architectures

The MCRR ARM instruction is available in ARMv6 and above, and E variants of ARMv5T.
The MCRR2 ARM instruction is available in ARMv6 and above.
These 32-bit Thumb instructions are available in ARMv6T2 and above.
There are no 16-bit versions of these instructions in Thumb.
Related reference
10.8 Condition code suffixes
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