10.54 MLS

Multiply-Subtract, with signed or unsigned 32-bit operands, giving the least significant 32 bits of the result.

Syntax

MLS{cond} Rd, Rn, Rm, Ra
where:
cond
is an optional condition code.
S
is an optional suffix. If S is specified, the condition flags are updated on the result of the operation.
Rd
is the destination register.
Rn, Rm
are registers holding the values to be multiplied.
Ra
is a register holding the value to be subtracted from.

Operation

The MLS instruction multiplies the values in Rn and Rm, subtracts the result from the value in Ra, and places the least significant 32 bits of the final result in Rd.

Register restrictions

You cannot use PC for any register.
You can use SP in ARM instructions but this is deprecated in ARMv6T2 and above. You cannot use SP in Thumb instructions.

Architectures

The MLS ARM instruction is available in ARMv6T2 and above.
This 32-bit Thumb instruction is available in ARMv6T2 and above.

Example

 MLS     r4, r5, r6, r7
Related reference
10.8 Condition code suffixes
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