10.68 ORN (Thumb only)

Logical OR NOT.

Syntax

ORN{S}{cond} Rd, Rn, Operand2
where:
S
is an optional suffix. If S is specified, the condition flags are updated on the result of the operation.
cond
is an optional condition code.
Rd
is the destination register.
Rn
is the register holding the first operand.
Operand2
is a flexible second operand.

Operation

The ORN Thumb instruction performs an OR operation on the bits in Rn with the complements of the corresponding bits in the value of Operand2.
In certain circumstances, the assembler can substitute ORN for ORR, or ORR for ORN. Be aware of this when reading disassembly listings.

Use of PC

You cannot use PC (R15) for Rd or any operand in the ORN instruction.

Condition flags

If S is specified, the ORN instruction:
  • Updates the N and Z flags according to the result.
  • Can update the C flag during the calculation of Operand2.
  • Does not affect the V flag.

Examples

    ORN     r7, r11, lr, ROR #4
    ORNS    r7, r11, lr, ASR #32

Architectures

This 32-bit Thumb instruction is available in ARMv6T2 and above.
There is no ARM or 16-bit Thumb ORN instruction.
Related reference
10.3 Flexible second operand (Operand2)
10.138 SUBS pc, lr
10.8 Condition code suffixes
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