10.88 RFE

Return From Exception.

Syntax

RFE{addr_mode}{cond} Rn{!}
where:
addr_mode
is any one of the following:
IA
Increment address After each transfer (Full Descending stack)
IB
Increment address Before each transfer (ARM only)
DA
Decrement address After each transfer (ARM only)
DB
Decrement address Before each transfer.
If addr_mode is omitted, it defaults to Increment After.
cond
is an optional condition code.

Note

cond is permitted only in Thumb code, using a preceding IT instruction. This is an unconditional instruction in ARM code.
Rn
specifies the base register. Rn must not be PC.
!
is an optional suffix. If ! is present, the final address is written back into Rn.

Usage

You can use RFE to return from an exception if you previously saved the return state using the SRS instruction. Rn is usually the SP where the return state information was saved.

Operation

Loads the PC and the CPSR from the address contained in Rn, and the following address. Optionally updates Rn.

Notes

RFE writes an address to the PC. The alignment of this address must be correct for the instruction set in use after the exception return:
  • For a return to ARM, the address written to the PC must be word-aligned.
  • For a return to Thumb, the address written to the PC must be halfword-aligned.
  • For a return to Jazelle, there are no alignment restrictions on the address written to the PC.
No special precautions are required in software to follow these rules, if you use the instruction to return after a valid exception entry mechanism.
Where addresses are not word-aligned, RFE ignores the least significant two bits of Rn.
The time order of the accesses to individual words of memory generated by RFE is not architecturally defined. Do not use this instruction on memory-mapped I/O locations where access order matters.
Do not use RFE in unprivileged software execution.

Architectures

This ARM instruction is available in ARMv6 and above.
This 32-bit Thumb instruction is available in ARMv6T2 and above, except the ARMv7-M architecture.
There is no 16-bit version of this instruction.

Example

    RFE sp!
Related concepts
2.4 Processor modes, and privileged and unprivileged software execution
Related reference
10.125 SRS
10.8 Condition code suffixes
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