10.126 SSAT

Signed Saturate to any bit position, with optional shift before saturating.

Syntax

SSAT{cond} Rd, #sat, Rm{, shift}
where:
cond
is an optional condition code.
Rd
is the destination register.
sat
specifies the bit position to saturate to, in the range 1 to 32.
Rm
is the register containing the operand.
shift
is an optional shift. It must be one of the following:
ASR #n
where n is in the range 1-32 (ARM) or 1-31 (Thumb)
LSL #n
where n is in the range 0-31.

Operation

The SSAT instruction applies the specified shift, then saturates a signed value to the signed range –2sat–1x ≤ 2sat–1 –1.

Register restrictions

You cannot use PC for any register.
You can use SP in ARM instructions but this is deprecated in ARMv6T2 and above. You cannot use SP in Thumb instructions.

Q flag

If saturation occurs, this instruction sets the Q flag. To read the state of the Q flag, use an MRS instruction.

Architectures

This ARM instruction is available in ARMv6 and above.
This 32-bit Thumb instruction is available in ARMv6T2 and above.
There is no 16-bit version of this instruction in Thumb.

Example

    SSAT    r7, #16, r7, LSL #4
Related reference
10.127 SSAT16
10.60 MRS (PSR to general-purpose register)
10.8 Condition code suffixes
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