10.155 UDIV

Unsigned Divide.

Syntax

UDIV{cond} {Rd}, Rn, Rm
where:
cond
is an optional condition code.
Rd
is the destination register.
Rn
is the register holding the value to be divided.
Rm
is a register holding the divisor.

Register restrictions

PC or SP cannot be used for Rd, Rn, or Rm.

Architectures

This 32-bit Thumb instruction is available in ARMv7-R and ARMv7-M.
This ARM instruction is optional in ARMv7-R.
There is no 16-bit Thumb UDIV instruction.
Related reference
10.8 Condition code suffixes
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