11.2 VABS (floating-point)

Floating-point absolute value.


VABS{cond}.F32 Sd, Sm
VABS{cond}.F64 Dd, Dm
is an optional condition code.
Sd, Sm
are the single-precision registers for the result and operand.
Dd, Dm
are the double-precision registers for the result and operand.


The VABS instruction takes the contents of Sm or Dm, clears the sign bit, and places the result in Sd or Dd. This gives the absolute value.
If the operand is a NaN, the sign bit is cleared, but no exception is produced.

Floating-point exceptions

VABS instructions do not produce any exceptions.
Related reference
10.8 Condition code suffixes
Non-ConfidentialPDF file icon PDF versionARM DUI0379G
Copyright © 2007, 2008, 2011, 2012, 2014, 2015 ARM. All rights reserved.