11.12 VLDR (floating-point)

Extension register load.


VLDR{cond}{.size} Fd, [Rn{, #offset}]
VLDR{cond}{.size} Fd, label
is an optional condition code.
is an optional data size specifier. Must be 32 if Fd is an S register, or 64 otherwise.
is the extension register to be loaded, and can be either a D or S register.
is the ARM register holding the base address for the transfer.
is an optional numeric expression. It must evaluate to a numeric value at assembly time. The value must be a multiple of 4, and lie in the range –1020 to +1020. The value is added to the base address to form the address used for the transfer.
is a PC-relative expression.
label must be aligned on a word boundary within ±1KB of the current instruction.


The VLDR instruction loads an extension register from memory.
One word is transferred if Fd is an S register. Two words are transferred otherwise.
There is also a VLDR pseudo-instruction.
Related concepts
7.5 Register-relative and PC-relative expressions
Related reference
11.14 VLDR pseudo-instruction
10.8 Condition code suffixes
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