2.7. Connecting Trace

If the Core Tile test chip contains an Embedded Trace Macrocell (ETM), a Trace connector is provided on the Core Tile. Use the JTAG connector on the baseboard to provide the JTAG signals that are required for controlling the ETM.


If the test chip on the Core Tile does not contain an ETM, there are no trace connectors present on the Core Tile.

Trace using multiplexed trace packets, for example, RealView Trace and Multi-Trace, require only one Mictor connector (Trace Port A). The Core Tile supports both multiplexed (one trace connector) and demultiplexed mode (two trace connectors). The second connector is present to support trace tools that use demultiplexed trace packets.

Figure 2.9 illustrates a trace debugging setup with RealView Trace and RealView ICE. Figure 2.10 illustrates a trace debugging setup with Multi-Trace and Multi-ICE.


If you are using Core Tiles, use the Trace connector present on the Core Tile.

The baseboard has two trace connectors that are connected to the tile headers. Use these trace connections if a processor is instantiated in Logic Tiles mounted on the tile sites (Soft Macrocell Model of a CPU core). The trace size supported by the connectors is medium (16-bit packets).

For more details on using Trace, see About trace and the documentation supplied with your Trace hardware.

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