D.2. Backplane hardware

The mechanical layout for the PCI backplane is shown in Figure D.4.

The PCI backplane mechanical layout complies to PCI Specification v2.3 for a two slot short card system board.

The switches, indicators, and test points for the PCI backplane are listed in Table D.1, Table D.2, and Table D.3.

Table D.1. LED indicators

LEDSignalDescription
1MAN1nMAN2This LED illuminates to indicate Man2 clock selection
2MANnAUTOThis LED illuminates to indicate Auto clock selection
5CLK33ACTIVE

If Auto clock selection is selected, this LED illuminates to indicate 33MHz bus speed.

If manual clock selection of 10MHz is selected, this LED is illuminated.

6CLK66ACTIVE

If Auto clock selection is selected, this LED illuminates to indicate 66MHz bus speed.

If manual clock selection (of either 10MHz or 50MHz) is selected, this LED is illuminated.

7EXT

If Auto clock selection is selected, this LED is reserved for use by manufacturing tests.

If manual clock selection of 50MHz is selected, this LED is illuminated.

9PSONPower supply on/off indicator. The LED is illuminated when the unit is off (standby).
103V3Power supply voltage present
115VPower supply voltage present
1212VPower supply voltage present
13-12VPower supply voltage present
14PCI_nPRSNT1A and PCI_nPRSNT2AThis LED illuminates to indicate PCI card present and enabled in slot A.
15PCI_nPRSNT1B and PCI_nPRSNT2BThis LED illuminates to indicate PCI card present and enabled in slot B.
16PCI_nPRSNT1C and PCI_nPRSNT2CThis LED illuminates to indicate PCI card present and enabled in slot C. (This is the slot for the baseboard.)

Figure D.4. PCI backplane

PCI backplane

Table D.2. Configuration switches

SwitchSignalDescription
SW1-1MAN1nMAN2Determines the clock rate when SW1[1] is in the Manual position. See Setting the backplane configuration switches.
SW1-2MANnAUTOSelects between manual (ON) or automatic (OFF) clock selection
SW2-1nINCPLDOmits (ON) or includes (OFF) the PLD in the JTAG scan chain.
SW2-2TESTnENOmits (ON) or includes (OFF) the PCI sockets in the JTAG scan chain.

Table D.3. Power and reset switches

SwitchSignalDescription
SW3PSONPower on/off push button. Pressing the switch toggles the power between on and standby. SW3 signals are also connected to J6 and this enables the use of an external front-panel switch.
SW4SYSTEM_nRESETSystem reset push button. Pressing the switch generates a reset to the PCI arbiter on the backplane and all of the PCI cards. SW4 signals are also connected to J7 and this enables the use of an external front-panel switch.

Table D.4. Test points

Test pointSignalDescription
TP1GNDGround
TP2GNDGround
TP3TCLKJTAG clock (This signal is called P_TCK on the baseboard)
TP4PCI CLKPCI clock (This signal is called P_CLK on the baseboard)

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