4.5. Character LCD display

This is a custom peripheral that provides an interface to a standard HD44780 16 x 2 character LCD module.

Table 4.31. Character LCD display implementation

PropertyValue
Location Board (custom register interface implemented in FPGA)
Memory base address0x10008000-0x10008FFF (control registers in FPGA)
Interrupt 22
DMANA
Release versioncustom logic
Reference documentation (see also Character LCD controller)

Note

The HD44780 display interface is very slow.

Requests to read or write data or a command to the character LCD are captured and executed later. It is not until 500ns later that the access is completed. Poll access complete flag (bit 0 of CHAR_RAW) or wait for a Char LCD interrupt on SIC7 to check that the last access has completed.

After accepting a command, the character LCD typically requires 37μs to finish processing. Some commands, Return Home for example, take substantially longer (20ms). Poll the busy signal to determine when the display is ready for a new data or command write.

An interrupt signal is generated by the character LCD controller a short time after the raw data is valid. However this interrupt signal is reserved for future use and you must use a polling routine instead of an interrupt service routine.

At power on, the character LCD displays status information on connected tiles (see Tile status messages displayed on the LCD).

The control and data registers for the character LCD interface are listed in Table 4.32.

Table 4.32. Character LCD control and data registers

Address

Name

Type

Description
0x10008000CHAR_COMWrite command, read busy status

A write to this address results in a write to the HD44780 command register some cycles later. A read from this address will cause a read from the HD44780 busy register some cycles later.

Note

The data read from this address is not valid LCD register data. Use the CHAR_RAW and CHAR_RD registers to return LCD register data.

0x10008004CHAR_DATWrite data RAM, read data RAM

A write to this address results in a write to the HD44780 data register some cycles later. The first write transfers data bits [7:4] to bits [7:4] of the HD44780 data register. The second write transfers data bits [7:4] to bits [3:0] of the HD44780 data register.

A read to this address results in a read to the HD44780 data register some cycles later.The data read from this address is not valid LCD register data. Use the CHAR_RAW and CHAR_RD registers to return LCD register data.

0x10008008CHAR_RDRead captured data from an earlier read command

Bits [7:4] contain data from the last request read, valid only when bit 8 is set in CHAR_RAW.

Bits [31:8] and [3:0] should be ignored.

Two read operations are required to return the 8 bits of data in the HD44780 data register. The HD44780 returns data in bits [7:4] only. The first read returns bits [7:4] of the data register and the second read returns bits [3:0] of the data register.

0x1000800CCHAR_RAWWrite to reset access complete flag, read to determine if data in CHAR_RD is valid

Bit 8 (CHAR_DONE) is set by the display to indicate access is complete (write 0 to clear). The bit is set if read data is valid. Bits [31:9] and [7:0] should be ignored.

0x10008010CHAR_MASKWrite interrupt mask

Set bit 0 to 1 to enable generating an interrupt when access completes (CHAR_DONE HIGH).

0x10008014CHAR_STATRead statusBit 0 is the state of CHAR_DONE ANDed with the CHAR_MASKINT.

An overview of the commands available is listed in Table 4.33.

Table 4.33. Character LCD display commands

Command Bit patternDescription
Clear display b00000001Clears entire display and sets display RAM address counter to zero.
Return homeb0000001xSets display RAM address counter to zero and returns the cursor to the first character position. Display RAM contents are not erased.
Entry mode set b000001DS

Sets cursor move direction to increment (D HIGH) or decrement (D LOW).

Specifies display shift (S HIGH).

This setting affects future display RAM read or write operation.

Display on/off control b00001DCB

Sets entire display on /off (D HIGH for on)

Sets cursor on/off (C HIGH for on)

Sets cursor position character blinking on/off (B HIGH for on).

Cursor or display shift b0001CDxx

Moves cursor (C LOW) or shifts display (C HIGH) right (D HIGH) or left (D LOW) without changing display RAM contents.

Function setb001LNFxx

Sets interface data length to 8 (L HIGH, the default) or 4 (L LOW).

Sets number of display lines to two (N HIGH, the default) or Sets one (N LOW).

Sets character font to 5x10 (F HIGH, the default) or 5x8 (F LOW).

Set CGRAM address b01AAAAAASets character generator RAM address to bAAAAAA. Character generator RAM data is sent and received after this setting.
Set DDRAM address b1AAAAAAASets display RAM address to bAAAAAAA. Display RAM data is sent and received after this setting.

For more details on the character display, see the example code for accessing the character LCD is provided on the CD as part of the Boot Monitor and Selftest applications. This code is copied to your hard disk during installation, see:

Note

The interface bus to the character LCD is eight-bits wide, but only four bits are used. An eight-bit write access to the controller requires is done as two four-bit accesses. This is done transparently to the software.

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