4.3.9. PCI Control Register, SYS_PCICTL

The SYS_PCICTL register at 0x10000044 are used with the bridge to the PCI bus as listed in TheTable 4.12.

Table 4.12. PCI control


Reserved. Use read-modify-write to preserve value.



(PCICONTROLOUT) Signals to PCI block.



(PCICONTROLIN) Signals from PCI block.



(PCIDETECT) Setting bit 0 HIGH enables PCI bus accesses.

Read returns a HIGH in bit 0 if a PCI board is present in the expansion backplane.

Additional registers that control the initialization and mapping of PCI are described in PCI controller.

See also Appendix D PCI Backplane and Enclosure and PCI interface.

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