4.25. Watchdog

The SP805 Watchdog module is an AMBA compliant SoC peripheral developed, tested and licensed by ARM Limited. The Watchdog module consists of a 32-bit down counter with a programmable timeout interval that has the capability to generate an interrupt and a reset signal on timing out. It is intended to be used to apply a reset to a system in the event of a software failure.


The Watchdog counter is disabled if the core is in debug state.

Table 4.78. Watchdog implementation

Location FPGA
Memory base address0x10010000
Interrupt 0
Release versionARM WDOG SP805 r1p0-02ltd0
Reference documentationARM PrimeCell Watchdog Controller (SP805) Technical Reference Manual

The following Watchdog module parameters are programmable:

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