4.9. Dynamic Memory Controller, DMC

The PL340 PrimeCell Dynamic Memory Controller (DMC) is an AMBA compliant SoC peripheral that is developed, tested, and licensed by ARM Limited. Table 4.41 lists the DMC implementation.

Table 4.41. DMC implementation

Location FPGA
Memory base address0x10018000
Interrupt NA
Release versionSee the relevant application note of your implementation and read the identification registers in your TRM.
Reference documentation

ARM PrimeCell Dynamic Memory Controller (PL340) Technical Reference Manual

See also Memory aliasing at reset.

The DMC controls the dynamic memory on the baseboard.

For information on default values for the memory controllers, see Memory characteristics . Sample programs that configure and use dynamic memory can be found on the CD that accompanies the baseboard.

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