The power supply circuit is shown in Figure 3.16.
If the baseboard is powered from the 12V brick power supply:
A nominal 12V level (DC fused) is supplied to the FETs (shown in Figure 3.17). The FETs are switched on if DC fused has correct polarity supply and is within plus or minus 10%.
If the input voltage is too high, the comparator switches off the FETs and disconnects DC fused from VSMP (the 12V power to the switched-mode regulators) and 12VDC.
If the input drops too low, shutdown signals nSHDN1, and nSHDN2 become LOW and the regulators are switched off.
The power supply can be toggled on and off by pressing the Power/Standby push button.
The shutdown circuitry is shown in Figure 3.17.
If a link is placed across J48, the power is forced on and the on/off toggle switch has no effect.
The regulators are supplied by the VSMP voltage. The track inputs on the voltage regulators ensure that the voltage is applied in the correct sequence (for example, the output from the 3V3 regulators cannot exceed the output from the 5V regulators during power on).
If the baseboard is powered from the PCI backplane or the screw terminals, the VSMP and DC fused voltages are not present. Therefore:
the 3V3SB standby voltage is not present
The control signal for the 5V regulator to the AACI (nSHDN2) is held HIGH by the 12V supply from the PCI backplane
The control signal to the other voltage regulators (nSHDN1) is held LOW
the Power/Standby push button has no effect and you must use the external power source to turn the system on or off.
Caution
There is no overvoltage or polarity protection if the PCI backplane or screw terminals are used as the power source. Connecting an incorrect voltage to the screw terminals might damage the baseboard and any boards connected to it.
The 12V DCIN supply is fused (5A) before connection to the polarity and shutdown logic. The LCD expansion, USB, Keyboard, and Mouse connectors have an additional fuse (1A) on the 5V supply.
Warning
Refer to the Bill of Materials (BOM)
file in the schematics directory for the fuse manufacturer
and part numbers. You must use the same type and rating of fuse
if you replace a blown fuse.
There are also two regulators for the USB debug circuit. These are powered from the 5V supplied by the host computer on the USB connector. See JTAG and USB debug port support.
Logic Tiles supply the correct interface voltage for memory or peripherals by driving the VDDIO power pins on the HDRX and HDRY Logic Tile connectors. If a tile is not present on a tile site:
there is not a supply voltage provided by the tile to VCCO1 on tile site 1 (or no VCCO2 for tile site 2)
the T1_nTILEDET signal is high if there is not a tile on tile site 1 (T2_nTILEDET is high if no tile on site 2)
FETs Q1 and Q2 for tile site 1 (or Q3 and Q4 for site 2) connect the local 3.3V supply to the appropriate FPGA I/O supply pins.
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