3.23.2. Integrated Logic Analyzer

The Integrated Logic Analyzer (ILA) connector J19 enables you to connect an ILA compatible analyzer to access the baseboard and Logic Tile FPGA JTAG signals at the same time as a JTAG debugger is being used to examine code on the CPU.

If the board is in debug mode, the configuration scan chain is not normally accessible. The integrated logic analyzer connector, however, provides access to the baseboard configuration scan chain and enables debugging of the baseboard and Logic Tile FPGA designs and the software simultaneously. For an example of an ILA system, see the ChipScope details on the Xilinx web site (www.xilinx.com).

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