E.1.2. Memory board configuration

The memory width for the memory board is coded into signals present on the connector. The serial EEPROM on the memory board can be read from the baseboard to identify the type of memory on the board and how it is configured. This information can be used by the application or operating system to initialize the memory space.

Memory width selection on the static memory board

The memory width on the memory board is encoded into the CSWIDTH[1:0] signals as shown in Table E.1.

If the configuration switches are set to boot from PISMO memory and more than one PISMO expansion board is present, the CSWIDTH signals on the bottom-most memory board determine the memory width for the boot memory.

Table E.1. Memory width encoding

008 bit
0116 bit
1032 bit, default
11No memory present


There are two serial devices on the baseboard serial bus:

  • Memory expansion board EEPROM at 0xA2 for write, 0xA3 for read

  • Real Time Clock (Time of Year) at 0xD0 for write, 0xD1 for read

See Two-wire serial bus interface for details on the serial bus interface.

The expansion EEPROM provides information about the type of memory expansion board installed:

  • PISMO vendor and product name

  • power supply and I/O voltages supported

  • details of the local memory banks, for example, bank architecture, access mode, access time.

See the PISMO specification for more details about the EEPROM contents.

Copyright © 2005-2011 ARM Limited. All rights reserved.ARM DUI 0411D