a tile site to support RealView Logic Tiles

a Cortex-A8 test chip

a Debug FPGA implementing the CoreSight™ infrastructure

a Northbridge implementing the major system controllers and interfaces

a Southbridge implementing most of the remaining system peripherals

512MB of 32-bit wide (DDR) SDRAM (2 x 256MB banks)

2MB of 32-bit wide (Pseudo) SRAM

128MB of 32-bit wide NOR flash in two banks of 64MB

PISMO connector for up to 256MB (4x 64MB) of static memory expansion

PCI and PCI Express expansion buses (2 slots for each interface type)

USB interface providing 1 OTG and 2 Full Speed USB 2.0 host ports

Ethernet interface providing 10Base-T and 100Base-TX support

DVI-I interface providing color LCD display and analog VGA monitor support

Synchronous Serial Port (SSP) interface

4x RS232 interfaces with modem support

PS2 keyboard and mouse interfaces

audio CODEC interface (AAC)

CompactFlash, MMC, SD and SIM Card interfaces

8x general purpose (User) switches and LEDs

Real-Time Clock (RTC)

Time Of Year clock (TOY) with backup battery

programmable clock generators

power supplies, voltage control, and current monitoring circuitry

JTAG config and debug, and Integrated Logic Analyzer (ILA) support

Trace port (32-bit) with Embedded Trace Buffer

USB config port.

power on-off button and indicator

USB Config port connector

USB Config switch and indicator

Soft Reset switch

Hard Reset switch

CompactFlash interface connector

USB OTG interface connector

SD and MMC memory card interface connector

User Switches 1 to 8

User LEDs 1 to 8

SIM card interface

5¼ inch bay (for customer hardware expansion).

power connector and on-off switch

keyboard and mouse interface (PS/2)

Ethernet interface (10Base-T and 100Base-TX)

2x USB 2.0 host ports

video interface (DVI − color LCD and analog VGA support)

JTAG debugger interface

4x RS232 serial ports (includes handshake signals for modem support)

audio interface (analog mic-in, line-in, and line-out supported)

2x PCI and 2x PCI Express slots.