4.4. System Controller (SYSCTRL)

The SP810 System Controller (SYSCTRL) is an AMBA compliant SoC peripheral that is developed and tested by ARM Limited.

Table 4.31. SYSCTRL implementation

PropertyValue
Location Southbridge
Memory base address
  • SYSCTRL 0: 0x10001000

  • SYSCTRL 1: 0x1001A000

Interrupt
DMA
Release versionARM SYSCTRL SP810 r0p0
Reference documentationPrimeXsys System Controller (SP810) Technical Reference Manual DDI 0254B See also System Controller.

SYSCTRL 0

Controls the remap signal, watchdog 0 clock enable, and timer enables for timers 0,1,2 and 3.

SYSCTRL 1

Controls watchdog 1 clock enable, and timer enables for timers 4,5,6 and 7.

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