4.2.1. Remapping of boot memory

On reset, the Cortex-A8 begins executing code at address 0x00000000. During normal operation this address is mirrored volatile DRAM but at reset, remapping enables mirrored non-volatile static memory to be accessed. The non-volatile memory to be remapped is determined by configuration switch S7-1 as listed in Table 4.3.

Table 4.3. Boot memory

S7-1Chip selectMemory Range Comment
OFFSMC CS0 0x40000000- 0x40FFFFFFLower 16MB bank of NOR flash is remapped to 0x00000000-0x00FFFFFF.
ONSMC CS40x50000000- 0x50FFFFFFLower 16MB bank of PISMO expansion memory is remapped to 0x00000000-0x00FFFFFF.


While NOR flash or PISMO expansion memory is remapped, any access to an address in the range 0x01000000 to 0x03FFFFFF will be read back as zero.

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