4.7. Single Master Direct Memory Access Controller, SMDMAC

The PL081 PrimeCell Single Master DMA Controller (SMDMAC) is an AMBA compliant SoC peripheral that is developed, tested, and licensed by ARM Limited.

Table 4.38. SMDMAC implementation

PropertyValue
Location Northbridge
Memory base address

0x10030000 for SMDMAC configuration

Note

There is also a DMA mapping register SYS_DMAPSR at 0x10000064. See DMA peripheral map register, SYS_DMAPSR.

Interrupt 56
DMA
Release versionARM DMAC PL081 r1p2
Reference documentationARM PrimeCell Single Master DMA Controller (PL081) Technical Reference Manual. See also Dynamic memory controller, DMC.

Eight peripheral DMA interfaces are provided in two selectable DMA mappings, a third mapping option has been reserved for future use. Only DMAC flow control is supported.

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