4.23. Watchdog

The SP805 Watchdog module is an AMBA compliant SoC peripheral developed and tested by ARM Limited.

The module is an AMBA slave module and connects to the Advanced Peripheral Bus (APB). The Watchdog module consists of a 32-bit down counter with a programmable timeout interval that has the capability to generate an interrupt and a reset signal on timing out. It is intended to be used to apply a reset to a system in the event of a software failure.

Table 4.92. Watchdog implementation

PropertyValue
Location Southbridge
Memory base address
  • Watchdog 0: 0x1000F000

  • Watchdog 1: 0x10010000

Interrupt
  • Watchdog 0: 32

  • Watchdog 1: 72

DMA
Release versionARM WDOG SP805 r2p0
Platform Library supportNo support provided.
Reference documentationARM Watchdog Controller (SP805) Technical Reference Manual

Note

The Watchdog counter is disabled if the core is in debug state.

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