4.3. Status and system control registers

The baseboard status and system control registers enable the PB-A8 to determine its environment and to control the on-board systems. The register set is listed in Table 4.5.

Note

All registers are 32 bits wide and do not support byte writes. Write operations must be word-wide and bits marked as reserved must be preserved using read-modify-write.

The status and system control registers base address is 0x10000000.

Table 4.5. Register map for status and system control registers

RegisterOffset ValueAccess[a]Reset ValueDescription
SYS_ID0x0000Read-only0x01780500System Identifier. See ID Register, SYS_ID.
SYS_USERSW0x0004Read-only0x0000000XXBits [7:0] map to front panel User Switches 1 to 8 and baseboard switches S4-1 to S4-8. See User Switch Register, SYS_USERSW.
SYS_LED0x0008Read/Write0x000000000Bits [7:0] map to User LEDs 1 to 8. See LED Register, SYS_LED.
SYS_OSC[0:4]0x000C0x001CRead/Write Lockable0: 0x00012C5C 1: 0x00002CC0 2: 0x00002C75 3: 0x00020211 4: 0x00002C75Settings for the ICS307 programmable oscillators: OSC0 - OSC4. See Oscillator Registers, SYS_OSCx.
SYS_LOCK0x0020Read/Write 0x00010000Write 0xA05F to unlock lockable registers. See Lock Register, SYS_LOCK.
SYS_100HZ0x0024Read-only0x00000000100Hz counter. See 100Hz Counter, SYS_100HZ.
Reserved0x0028- 0x002C
SYS_FLAGS0x0030Read0x00000000

General-purpose flags (reset by any reset). See Flag Registers, SYS_FLAGSx and SYS_NVFLAGSx.

SYS_FLAGSSET0x0030Write0x00000000Set bits in general-purpose flags.
SYS_FLAGSCLR0x0034Write-onlyClear bits in general-purpose flags.
SYS_NVFLAGS0x0038Read0xXXXXXXXXGeneral-purpose nonvolatile flags (reset only on power up).
SYS_NVFLAGSSET0x0038Write0x00000000Set bits in general-purpose nonvolatile flags.
SYS_NVFLAGSCLR0x003CWrite-onlyClear bits in general-purpose nonvolatile flags.
SYS_RESETCTL0x0040Read/Write Lockable0x00000000Controls the software reset level to be applied to system components. See Reset Control Register, SYS_RESETCTL.
Reserved0x0044
SYS_MCI0x0048Read-only0x0000000XMCI status and control register. See MCI Register, SYS_MCI.
SYS_FLASH0x004CRead/Write0x00000000Controls write protection of flash devices. See Flash Control Register, SYS_FLASH.
SYS_CLCD0x0050Read/Write0x00001F00Controls LCD power and multiplexing. See CLCD Control Register, SYS_CLCD.
Reserved0x0054Read/WriteNot used by the PB-A8.
SYS_CFGSW0x0058Read-only0x000000XXRead register returns the current switch settings of switch S7. See Configuration select switch, SYS_CFGSW.
SYS_24MHZ0x005CRead-only0x0000000032-bit counter clocked at 24MHz. See 24MHz Counter, SYS_24MHZ.
SYS_MISC0x0060Read-only0x000XX000Miscellaneous control flags. See Miscellaneous flags, SYS_MISC.
SYS_DMAPSR0x0064Read/Write0x00000000Selection control for remapping DMA from external peripherals to DMA. See DMA peripheral map register, SYS_DMAPSR.
SYS_PEX_STAT0x0068Read-only0x0000XXXXPCI Express status register. See PCI Express status register, SYS_PEX_STAT.
SYS_PCI_STAT0x006CRead/Write Lockable0x00000337PCI status register. See PCI status register, SYS_PCI_STAT.
Reserved0x0070
SYS_PLD_CTRL10x0074Read/Write Lockable0x000011F8This register sets the Config PLD write data register fields that configure the Cortex-A8 test chip. See PLD control register 1, SYS_PLD_CTRL1.
SYS_PLD_CTRL20x0078Read/Write Lockable0xXXXXXXXXThis register reads the Config PLD read data register fields that provide status information from the Cortex-A8 test chip. See PLD control register 2, SYS_PLD_CTRL2
SYS_PLL_INIT0x007CRead/Write Lockable0x0B0101D0This register defines the Cortex-A8 test chip PLL initialization values. See PLL initialization register, SYS_PLL_INIT.
Reserved0x0080
SYS_PROCID00x0084Read-only0x0E024000Read returns a description for the test chip present on the platform baseboard (PB). See Processor ID register 0, SYS_PROCID0.
SYS_PROCID10x0088Read-only0xFF000000Indicates that there is no Core Tile fitted.
SYS_OSCRESET[0:4]0x008C- 0x009CRead/Write0: 0x00012C5C 1: 0x00002CC0 2: 0x00002C75 3: 0x00020211 4: 0x00002C75

Value to load into the SYS_OSC[0:4] registers on a manual reset. See Oscillator reset registers, SYS_OSCRESETx.

SYS_VOLTAGE_CTL[0:7]0x00A0 0x00BCRead/Write LockableMonitoring and control of Cortex-A8 voltages and currents. See Voltage control registers, SYS_VOLTAGE_CTLx.
SYS_TEST_OSC[0:4]0x00C0- 0x00D0Read-only32-bit counters clocked from the ICS307 programmable oscillators OSC0 - OSC4. See Oscillator test registers, SYS_TEST_OSCx.
SYS_OSC[5:6]0x00D4- 0x00D8Read/Write Lockable5: 0x00032C5C 6: 0x00002C70Settings for the ICS307 programmable oscillators OSC5 - OSC6. See Oscillator Registers, SYS_OSCx.
SYS_OSCRESET[5:6]0x00DC- 0x00E0Read/Write Lockable5: 0x00032C5C 6: 0x00002C70

Value to load into the SYS_OSC[5:6] registers on a manual reset. See Oscillator reset registers, SYS_OSCRESETx.

SYS_TEST_OSC[5:6]0x00E4- 0x00E8Read-only32-bit counters clocked from the ICS307 programmable oscillators OSC5 - OSC6. See Oscillator test registers, SYS_TEST_OSCx.
SYS_OSC70x00ECRead/Write Lockable0x00032C5CSettings for the ICS307 programmable oscillator OSC7. See Oscillator Registers, SYS_OSCx.
SYS_OSCRESET70x00F0Read/Write Lockable0x00032C5C

Value to load into the SYS_OSC7 register on a manual reset. See Oscillator reset registers, SYS_OSCRESETx.

SYS_TEST_OSC70x00F4Read-only32-bit counter clocked from the ICS307 programmable oscillator OSC7. See Oscillator test registers, SYS_TEST_OSCx.
SYS_DEBUG0x00F8Read/Write Lockable0xX000014DCortex-A8 debug unit control and status. See Debug control and status register, SYS_DEBUG.
SYS_TESTMODE0x00FCRead/Write Lockable0x00000000Processor test mode control. See Test mode register, SYS_TESTMODE.
SYS_PLL_RESET0x0100Read/Write Lockable0x0B0101D0This register defines the Cortex-A8 test chip PLL initialization values. See PLL Reset register, SYS_PLL_RESET.

[a] If Access is lockable, the register can only be written if SYS_LOCK is unlocked (see Lock Register, SYS_LOCK).


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