4.3.26. Debug control and status register, SYS_DEBUG

This register at 0x100000F8 provides Cortex-A8 debug control and status.

Figure 4.24 shows the register bit assignment.

Figure 4.24. SYS_DEBUG register

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The function of the register bits are listed in Table 4.28.

Table 4.28. SYS_DEBUG register

BitsAccessNameResetDescription
[31]Read-onlyDBGNOPWRDWNb0No power down indicator from Cortex-A8 processor. See Cortex-A8 Technical Reference Manual (DDI 0344).
[30]Read-onlyDBGPWRDWNACKb0Power-down acknowledge from Cortex-A8 processor. See Cortex-A8 Technical Reference Manual (DDI 0344).
[29]Read-onlyDBGACKb0Indicates that the system has entered debug state. See Cortex-A8 Technical Reference Manual (DDI 0344).
[28:9]Read/Write0x00000Reserved.
[8]Read/WriteNIDENb1Authentication signal: Noninvasive debug enable. See Cortex-A8 Technical Reference Manual (DDI 0344).
[7]Read/WriteETMPWRDWNREQb0ETM power-down request. See Cortex-A8 Technical Reference Manual (DDI 0344).
[6]Read/WriteDBGNOCLKSTOPb1Debug clock control signal. See Cortex-A8 Technical Reference Manual (DDI 0344).
[5]Read/WriteDBGOSLOCKINITb0Reset value for the OS lock. See Cortex-A8 Technical Reference Manual (DDI 0344).
[4]Read/WriteDBGPWRDWNREQb0Processor power-down request. See Cortex-A8 Technical Reference Manual (DDI 0344).
[3]Read/WriteSPNIDENb1Authentication signal: Secure privileged noninvasive debug enable. See Cortex-A8 Technical Reference Manual (DDI 0344).
[2]Read/WriteSPIDENb1Authentication signal: Secure privileged invasive debug enable. See Cortex-A8 Technical Reference Manual (DDI 0344).
[1]Read/WriteEDBGRQb0External debug request. See Cortex-A8 Technical Reference Manual (DDI 0344).
[0]Read/WriteDBGENb1Authentication signal: Invasive debug enable. See Cortex-A8 Technical Reference Manual (DDI 0344).

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